To Download RF5110G-15 Datasheet File

4 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. 15 200 335 ma idle current, p in <-30dbm 11 0 ? ap in <-30dbm, v apc1,2 =0.2v 110 ? ap in <-30dbm, v apc1,2 =0.2v, temp=+85c
5 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. pin function description interface schematic 1vcc1 power supply for the pre-amplifier stage and interstage matching. this pin forms the shunt inductance needed for proper tuning of the interstage match. refer to the application schematic for proper configuration. note that position and value of the components are important. see pin 3. 2gnd1 ground connection for the pre-amplifier stage. keep traces physically short and connect immediately to the ground plane for best performance. it is important for stability that this pin has it?s own vias to the groundplane, to minimize any common inductance. see pin 1. 3rf in rf input. this is a 50 ? input, but the actual impedance depends on the interstage matching network connected to pin 1. an external dc blocking capacitor is required if this port is connected to a dc path to ground or a dc voltage. 4gnd2 ground connection for the driver stage. to minimize the noise power at the output, it is recommended to connect this pin with a trace of about 40mil to the ground plane. this will slightly reduce the small signal gain, and lower the noise power. it is important for stability that this pin have it?s own vias to the ground plane, minimizing common inductance. see pin 3. 5vcc2 power supply for the driver stage and interstage matching. this pin forms the shunt inductance needed for proper tuning of the interstage match. please refer to the application schematic for proper configuration, and note that position and value of the components are important. 6vcc2 same as pin 5. 7nc not connected. 82f0 connection for the second harmonic trap. this pin is internally connected to the rf out pins. the bonding wire together with an external capacitor form a series resonator that should be tuned to the second harmonic fre- quency in order to increase effici ency and reduce spurious outputs. same as pin 9. 9rf out rf output and power supply for the output stage. bias voltage for the final stage is provided through this wide output pin. an external matching net- work is required to provide the optimum load impedance. 10 rf out same as pin 9. same as pin 9. 11 rf out same as pin 9. same as pin 9. 12 rf out same as pin 9. 13 nc not connected. 14 vcc power supply for the bias circuits. 15 apc2 power control for the output stage. see pin 16 for more details. see pin 16. 16 apc1 power control for the driver stage and pre-amplifier. when this pin is "low," all circuits are shut off. a "low" is typically 0.5v or less at room tempera- ture. a shunt bypass capacitor is required. during normal operation this pin is the power control. control range varies from about 1.0v for -10dbm to 2.6v for +35dbm rf output power. the maximum power that can be achieved depends on the actual output matching; see the application infor- mation for more details. the maximum current into this pin is 5ma when v apc1 =2.6v, and 0ma when v apc =0v. pkg base gnd ground connection for the output stage. this pad should be connected to the ground plane by vias directly under the device. a short path is required to obtain optimum performance, as well as to provide a good thermal path to the pcb for maximum heat dissipation. gnd1 rf in vcc1 from bias stages gnd2 vcc2 from bias stages gnd pckg base rf out from bias stages gnd vcc to rf stages gnd apc
6 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. package drawing
7 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. theory of operation general purpose radio applications rf5110g has seen widespread use in gsm handset applications, but it can also be used as a final transmit pa for general pur- pose radio (fsk, ask). the application schematics in this da ta sheet outline matching for commonly used frequency bands. matching is shown for 150mhz, 220mhz, 450mhz, and 865mh z to 928mhz. the standard 900mhz gsm evaluation board can be easily converted for these bands, using the values in dicated. the 865mhz to 928mhz conversion is the most direct, with adjustment required only on output match. the others sh ow changes at input, 1st interstage, 2nd interstage, and output. common components can be used in most cases. the only key component is the choke seen on rf output. during develop- ment of the matches, one goal was to achieve stability (no spurious) into 5:1 output vswr. the 1 ? h value and construction proved essential in achieving this level of stability. this theory of operation applies to an open loop system utiliz ing no power control. in the trad itional gsm application, power i s sampled at the rf5110g?s output and fed back to a log detect function. dac voltage (v set ) is also input to the log detector. log detector output drives the v apc pin of rf5110g such that output power corresponding to v set is obtained, with constant input power>0dbm applied. power can be set over the full range of defined levels, ranging from small signal to compression. in addition, the control loop is used for ramping in accordance wi th gsm specifications. if power control is used in the system under consideration, most of the open loop constraints covere d here will not apply, aside fr om thermal considerations dis- cussed below. when used in an open loop system, rf5110g should be operat ed in compression. when runnin g small signal, some variation in gain (and therefore output power) will be seen over temperature extremes between -40 ? c and 85 ? c. when operated in com- pression, the impact of this variation is substantially mitigated, making open loop application practical. ?compression? in thi s case is defined where efficiency exceeds 45%. in the graph sect ion of this data sheet, curves in each frequency band are shown for gain/efficiency/junction temperature versus p out /v cc . as indicated in the graphs, high efficiency can be obtained at compressed output power with appropriate choice of supply voltage (v cc ). for example, see the efficiency curves for 450mhz. operation at 31dbm shows efficiency=49% for v cc =2.8v. if 32dbm output is required in design, using v cc =3.3v gives 47% efficiency. so, the system designer can choose an appropriat e supply voltage which provides high efficiency at target p out . one important detail to consider is voltage level at v apc . as noted earlier, v apc level varies when operating within a power con- trol loop. this voltage controls output power from the pa. in open loop mode, v apc should be set at 2.8v to ensure consistent output power from rf5110g in volume production. another design consideration is maintaining acceptable juncti on temperature. in the gsm radio, output power in excess of 34dbm is common. this is allowable due to the limit on transm it duty cycle and pulse width. the worst case condition sees duty cycle at 50%, with pulse width equal to approximately 2msec. in this situation, the pa cuts off before junction temperatur e reaches the maximum that would be seen with longer pulse wi dth. for the non?gsm radio, it is assumed pulse width will exceed 2msec. thus, restrictions must be imposed on allowable maximum output po wer. the most conservative analysis is used, that for 100% duty cycle. thermal scans have shown r th (thermal resistance) of rf5110g+the evaluation board to be 36 ? c/w. r th for the evaluation board has been calculated at 10.4 ? c/w, giving rf5110g r th_jc =25.6 ? c/w. data sheet curves show projected junction temperatures (t j ) for each general purpose radio frequency band. r th of rf5110g+the evalu- ation board is taken into account. a conservative goal is t j ? 150 ? c when operating at a maximum specified ambient tempera- ture of 85 ? c. maximum output power will then be bo unded by that limit. observing the t j curves in bands from 150mhz to 928mhz, one sees that 32dbm is always at or below 150 ? c. this shows that the output load line in each match was intention- ally set for high efficiency. to ensure equivalent performance in one?s system, care should be taken to achieve efficiency equa l to or better than that seen in the data. thermal performance can be predicted with a simple calculation at a desired output power: p_dc=v cc xi cc p out (watt)=[10^(p out (dbm)/10)]/1000
8 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. dissipated power=p diss =p_dc?p out r th =r th_jc_rf5110g +r th_system_board (r th_jc_rf5110g =25.6 ? c/w) junction temperature @ 85 ? c ambient=t j =85 ? c+p diss xr th efficiency calculation alone may not suffice, as the system board may be substantially thicker than that of the rf5110g evalu- ation board. this will increase r th for the system, and likewise t j . layout considerations are important in repeating rf5110g evaluation board performance in a system design. via arrange- ment underneath the part is critical, as are other via arrang ements and supply trace routings (see ?gsm applications? section for the gsm case). layout files for the rf5110g evaluation bo ard can be obtained by contacting rfmd applications/sales. as already stated, output match is a primary consideration in achieving desired performance. in moving from the rf5110g evaluation board to the system board, the first approach would be to implement the same matching topology/values as seen in application schematics. performance on the system board can then be checked, particularly with regard to gain and efficiency at target output power. if needed, matching values can be ad justed to obtain equivalent pe rformance. observing each output match from 150mhz to 900mhz, it can be seen th at topology takes 1 of 2 possible configurations: c ? l ? c: 150mhz, 220mhz, 900mhz l ? c: 450mhz other areas which impact response are the 1st and 2nd interstage matches, found at pins 1 and 5/6, respectively. small sig- nal responses for each match are shown in this data sheet. chec king response on the system board will verify that input/inter- stage matches are in line (output to some extent as well). th is verification can be done by placing sma connectors at the input/output of rf5110g, and observing small signal response. following the guidelines contained within this section should ensure successful implementation of rf5110g in general radio applications. gsm applications the rf5110g is a three-stage device with 32 db gain at full powe r. therefore, the drive required to fully saturate the output i s +3dbm. based upon hbt (heterojunction bipolar transistor) techno logy, the part requires only a single positive 3v supply to operate to full specification. power control is provided through a single pin interface, with a separate power down control pin . the final stage ground is achieved through the large pad in the middle of the backside of the package. first and second stage grounds are brought out through separate ground pins for is olation from the output. these grounds should be connected directly with vias to the pcb ground plane, and not connected with the output ground to form a so called ?local ground plane? on the top layer of the pcb. the output is brought out throug h the wide output pad, and forms the rf output signal path. the amplifier operates in near class c bias mode. the final stag e is ?deep ab?, meaning the quiescent current is very low. as the rf drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 2000 ma. the optimum load for the output stage is approximately 2.6 ? . this is the load at the output collector, and is created by the series inductance formed by the output bond wires, vias, and mi crostrip, and 2 shunt capacitors external to the part. the opti- mum load impedance at the rf output pad is 2.6-j1.5 ?? with this match, a 50 ? terminal impedance is achieved. the input is internally matched to 50 ? with just a blocking capacitor needed. this data sheet defines the configuration for gsm operation. the input is dc coupled; thus, a blocking cap must be inserted in series. also, the first stage bias may be adjusted by a resis - tive divider with high value resistors on this pin to v pc and ground. for nominal operation, however, no external adjustment is necessary as internal resistors set the bias point optimally. v cc 1 and v cc 2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to the operating band. essentially, the bias is fed to this pin through a short microstrip. a bypass capacitor sets the inductance seen by the part, so placement of the bypass cap can affect th e frequency of the gain peak. this supply should be bypassed individually with 100pf capacitors before being combined with v cc for the output stage to prevent feedback and oscillations.
9 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. the rf out pin provides the output power. bias for the final stag e is fed to this output line, and the feed must be capable of supporting the approximately 2a of current required. care should be taken to keep the losses low in the bias feed and output components. a narrow microstrip line is recommended because dc losses in a bias choke will degrade efficiency and power. while the part is safe under cw operation, maximum power and reliability will be achieved under pulsed conditions. the data shown in this data sheet is based on a 12.5% duty cycle and a 600 ? s pulse, unless specified otherwise. the part will operate over a 3.0v to 5.0v range. under nomina l conditions, the power at 3.5v will be greater than +34.5dbm at +90c. as the voltage is increased, however, the output power will increase. thus, in a system design, the alc (automatic level control) loop will back down the power to the desired level. this must occur during operation, or the device may be dam- aged from too much power dissipation. at 5.0v, over +38dbm may be produced; however, this level of power is not recom- mended, and can cause damage to the device. the hbt breakdown voltage is >20v, so there are no issue with overvoltage. however, under worst-case conditions, with the rf drive at full power during transmit, and the output vswr extrem ely high, a low load impedance at the collector of the output transistors can cause currents much higher th an normal. due to the bipolar nature of the devices, there is no limitation on the amount of current de device will sink, and the safe current densities could be exceeded. high current conditions are potentially dangerous to any rf de vice. high currents lead to high channel temperatures and may force early failures. the rf5110g includes temperature compensati on circuits in the bias network to stabilize the rf transis- tors, thus limiting the current through the amplifier and protecting the devices from damage. the same mechanism works to compensate the currents due to ambient temperature variations. to avoid excessively high currents it is important to control the v apc when operating at supply voltages higher than 4.0v, such that the maximum output power is not exceeded.
10 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. internal schematic rf in 1.0 k ? vcc1 pkg base 4.5 pf gnd2 apc1 400 ? vcc vcc2 rf out apc2 300 ? vcc pkg base 5 ? 5 ? apc1
11 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. application schematic 150mhz fm band application schematic 220mhz fm band 10 nf 100 pf 180 ? c11 2 56 pf 100 pf 1 nf 1 ? h 1 taiyo yuden nr3012t1r0n 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 10 nf 8.2 nh 27 pf 1 nf vcc1 vcc2 33 nh 10 nf l4 15 nh 10 nf 1 nf rf out rf in vcc vcc vapc vapc 47 pf 0 ? 1 requires layout change to standard evaluation board. 2 c11 adjacent to l4. 3.3 ? f + 3.3 ? f + 50 mils c10 33 pf 27 pf 10 nf 100 pf 180 ? c10 2 33 pf c11 3 39 pf 100 pf 1 nf 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 10 nf 8.2 nh 27 pf 1 nf vcc1 vcc2 33 nh 0 ? 10 nf 10 nh 10 nf 1 nf rf out rf in vcc vcc vapc vapc 47 pf 1 requires layout change to standard evaluation board. 2 c10 is adjacent to l4. 3 c11 is 140 mils from l4. 1 ? h 1 taiyo yuden nr3012t1r0n 3.3 ? f + 3.3 ? f + 27 pf
12 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. application schematic 450mhz fm band 10 nf 56 pf 180 ? c11 22 pf 56 pf 47 pf 1 nf 1 ? h 1 taiyo yuden nr3012t1r0n 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 10 nf 330 pf 1 nf vcc1 330 pf vcc2 6.8 nh 10 nf l4 2.7 nh 10 nf 1 nf rf out 3.3 ? f + rf in vcc vcc vapc vapc 3.3 ? f + 47 pf c11 adjacent to l4. 1 requires layout change to standard evaluation board. 18 ? 0 ? 2 pf
13 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. application schematic 865mhz and 902mhz to 928mhz ism bands 10 nf 56 pf 180 ? c10 15 pf 1 nf 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 10 nf 11 nh 27 pf 1 nf vcc1 vcc2 1.6 nh 10 ? ? ferrite 10 nf 10 nf 1 nf rf out rf in vcc vcc vapc vapc 47 pf 8.8 nh 3.3 ? f + 3.3 ? f + 15 pf 27 pf 27 pf 1.5 pf c10 and c11 are adjacent to l4. 55 mils c11 5 pf l4 3.6 nh 56 pf 47 pf share the same pad.
14 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. application schematic gsm850 lumped element c17 10 nf c1 56 pf r1 180 ? j1 rf in 50 ? ? strip vapc c9 15 pf c10 2 pf c11 9.1 pf c12 56 pf j2 rf out vcc c14 33 pf c13 1 nf l3 8.8 nh 50 ? ? strip 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 c16 10 nf c15 33 pf vcc j3 vapc 50 ? ? strip c8 1.5 pf l1 11 nh c19 27 pf c3 1 nf vcc1 c7 33 pf c20 13 pf vcc2 l6 1.6 nh l2 10 ? ferrite c5 10 nf l4 1.8 nh c2 10 nf c6 1 nf 65 mils 40 mils p1 1 2 3 4 con4 p1-1 vcc p1-2 vcc gnd gnd p2 1 2 3 con3 p2-1 vapc gnd gnd c9 and c10 share the same pad. 60 mils c21 3.3 ? f + c18 3.3 ? f +
15 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. evaluation board schematic gsm900 lumped element c17 10 nf c1 56 pf r1 180 ? j1 rf in 50 ? ? strip vapc vcc c14 47 pf l3 8.8 nh 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 c16 10 nf c15 47 pf vcc j3 vapc 50 ? ? strip c8 1.5 pf l1 11 nh c19 27 pf c3 1 nf vcc1 c23 27 pf c20 15 pf vcc2 l6 1.6 nh l2 10 ? ferrite c5 10 nf c21 3.3 ? f + c18 3.3 ? f + c7 27 pf p1 1 2 3 4 con4 p1-1 vcc p1-2 vcc gnd gnd p2 1 2 3 con3 p2-1 vapc gnd gnd c9 15 pf c10 11 pf c11* 5.6 pf c12 56 pf j2 rf out 50 ? ? strip l4 3.6 nh 39 mils *c11 is adjacent to l4. c9 and c10 share the same pad. c23 and c27 share the same pad. c2 10 nf c6 1 nf c13 1 nf 55 mils
16 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. evaluation board layout board size 2.0? x 2.0? board thickness 0.032?; board material fr-4; multi-layer
17 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. typical test setup notes about testing the rf5110g the test setup shown above includes two attenuators. the 3db pad at the input is to minimize the effect on the signal genera- tor as a result of switching the input impedance of the pa. when v apc is switched quickly, the resulting input impedance change can cause the signal generator to vary its output signal, either in output level or in frequency. instead of an attenuat or an isolator may also be used. the attenuator at the output is to prevent damage to the spectrum analyzer, and should be sized accordingly to handle the power. it is important not to exceed the rated supply current and output power. when testing the device at higher than nominal supply voltage, the v apc should be adjusted to avoid the output power exceedin g +36dbm. during load-pull testing at the output it is important to monitor the forward power through a directional coupler. the forward power should not exceed +36dbm, and v apc needs to be adjusted accordingly. this simulates the behavior for the power control loop. to avoid damage, it is recom- mended to set the power supply to limit the current duri ng the burst not to exceed the maximum current rating. power supply 10db/5w 3db rf generator spectrum analyzer buffer x1 opamp pulse generator a buffer amplifier is recommended because the current into the v apc changes with voltage. as an alternative, the voltage may be monitored with an oscilloscope. v+v- s-s+
18 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. pcb design requirements pcb surface finish the pcb surface finish used for rfmd?s qualification process is electroless nickel, immersion gold. typical thickness is 3 ? inch to 8 ? inch gold over 180 ? inch nickel. pcb land pattern recommendation pcb land patterns are based on ipc-sm-782 standards when po ssible. the pad pattern shown has been developed and tested for optimized assembly at rfmd; however, it may require so me modifications to address co mpany specific assembly pro- cesses. the pcb land pattern has been develope d to accommodate lead and package tolerances. pcb metal land pattern a = 0.64 x 0.28 (mm) typ. b = 0.28 x 0.64 (mm) typ. c = 1.50 (mm) sq. b b b b a a a a b b b b a a a a c pin 16 pin 1 pin 12 pin 8 dimensions in mm. 0.50 typ. 1.50 typ. 0.50 typ. 0.55 typ. 0.55 typ. 0.75 typ. 0.75 typ. 1.50 typ. figure 1. pcb metal land pattern (top view)
19 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. pcb solder mask pattern liquid photo-imageable (lpi) so lder mask is recommended. the solder mask fo otprint will match what is shown for the pcb metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. the center-grounding pad shall also have a solder mask clearance. expansion of the pads to create solder mask clearance can be provided in the master data or reques ted from the pcb fabrication supplier. thermal pad and via design the pcb land pattern has been designed with a thermal pad th at matches the die paddle size on the bottom of the device. thermal vias are required in the pcb layout to effectively conduct heat away from the package. the via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. the via pattern used for the rfmd qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm pl ating on via walls. if micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. a = 0.74 x 0.38 (mm) typ. b = 0.38 x 0.74 (mm) typ. c = 1.60 (mm) sq. dimensions in mm. 1.50 typ. 0.50 typ. 0.50 typ. 0.55 typ. 0.55 typ. 0.75 typ. 0.75 typ. 1.50 typ. pin 16 pin 1 pin 12 pin 8 b b b b a a a a b b b b a a a a c figure 2. pcb solder mask pattern (top view)
20 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. rf5110g 153 mhz gain and efficiency versus p out /v cc 20 22 24 26 28 30 32 34 36 38 40 27.5 28.0 28.5 29.0 29.5 30.0 30.5 31.0 31.5 32.0 32.5 p out (dbm) gain (db) 30 35 40 45 50 55 60 65 70 75 80 efficiency (%) 153 mhz gain 3.6 v 153 mhz gain 3.3 v 153 mhz gain 3.0 v 153 mhz eff 3.6 v 153 mhz eff 3.3 v 153 mhz eff 3.0 v rf5110g 153 mhz junction temperature versus p out /v cc ambient temperature = 85c 120 122 124 126 128 130 132 134 136 138 140 142 27.5 28.0 28.5 29.0 29.5 30.0 30.5 31.0 31.5 32.0 32.5 p out (dbm) junction temperature (c) 153 mhz 3.6 v 153 mhz 3.3 v 153 mhz 3.0 v rf5110g 220 mhz gain and efficiency versus p out /v cc 25 27 29 31 33 35 37 39 41 43 45 47 49 26 27 28 29 30 31 32 33 34 35 p out (db) gain (db) 0 5 10 15 20 25 30 35 40 45 50 55 60 efficiency (%) 2.8 v gain 3.3 v gain 3.6 v gain 2.8 v eff 3.3 v eff 3.6 v eff rf5110g 220 mhz junction temperature versus p out /v cc ambient temperature = 85c 100 105 110 115 120 125 130 135 140 145 150 155 160 26 27 28 29 30 31 32 33 34 35 p out (dbm) t j (c) 2.8 v 3.3 v 3.6 v
21 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. rf5110g 865 mhz to 928 mhz gain and efficiency versus p out /v cc 27 28 29 30 31 32 33 34 35 36 37 38 39 40 27 28 29 30 31 32 33 34 p in (dbm) gain (db) 10 15 20 25 30 35 40 45 50 55 efficiency (%) 865 mhz gain 2.8v 928 mhz gain 2.8v 865 mhz gain 3.3v 928 mhz gain 3.3v 865 mhz gain 3.6v 928 mhz gain 3.6v 865 mhz eff 2.8v 928 mhz eff 2.8v 865 mhz eff 3.3v 928 mhz eff 3.3v 865 mhz eff 3.6v 928 mhz eff 3.6v rf5110g 865 mhz to 928 mhz junction temperature versus p out /v cc ambient temperature = 85c 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 27 28 29 30 31 32 33 34 p in (dbm) t j (c) 2.8v 865 mhz 2.8v 928 mhz 3.3v 865 mhz 3.3v 928 mhz 3.6v 865 mhz 3.6v 928 mhz rf5110g 450 mhz gain and efficiency versus p out /v cc 28 30 32 34 36 38 40 42 44 46 48 26 27 28 29 30 31 32 33 34 35 p out (dbm) gain (db) 0 5 10 15 20 25 30 35 40 45 50 55 60 efficiency (%) 2.8 v gain 3.3 v gain 2.8 v eff 3.3 v eff rf5110g 450 mhz junction temperature versus p out /v cc ambient temperature = 85c 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 26 27 28 29 30 31 32 33 34 35 p out (dbm) t j (c) 2.8 v 3.3 v
22 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. application schematic small signal response
23 of 24 rf5110g ds20151202 7628 thor ndike road, greensboro, nc 27409- 9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. tape and reel information carrier tape basic dimensions are based on eia481. the pocket is designed to hold the part for shipping and loading onto smt manufacturing equipment, while protecting the body and the solder terminals from damaging stresses. the individual pocket design can vary from vendor to vendor, but width and pitch will be consistent. carrier tape is wound or placed onto a shipping reel either 330 mm (13 inches) in diameter or 178 mm (7 inches) in diameter. the center hub design is large enough to ensure the radius formed by the carrier tape around it does not put unnecessary stress on the parts. prior to shipping, moisture sensitive parts (msl level 2a-5a) ar e baked and placed into the pockets of the carrier tape. a cove r tape is sealed over the top of the entire length of the carrier tape. the reel is sealed in a moisture barrier, esd bag, which is placed in a cardboard shipping box. it is important to note th at unused moisture sensitive parts need to be resealed in the moisture barrier bag. if the reels exceed the exposure limit and need to be rebaked, most carrier tape and shipping reels are not rated as bakeable at 125c. if baking is required, devices may be baked according to section 4, table 4-1, column 8 of joint industry standard ipc/jedec j-std-033a. the following table provides useful information for carrier tape and reels used for shipping the devices described in this docu - ment. qfn (carrier tape drawing with part orientation) rfmd part number reel diameter inch (mm) hub diameter inch (mm) width (mm) pocket pitch (mm) feed units per reel rf5110gtr7 7 (178) 2.4 (61) 12 4 single 2500 notes: 1. all dimensions are in millimeters (mm). 2. unless otherwise specified, all dimension tolerances per eia-481. ao = 3.18 0.10 bo = 3.18 0.10 f = 5.50 0.05 ko = 1.02 0.10 p = 4.00 0.10 w = 12.00 +0.30/-0.10 ?1.50.10 15 inch trailer top view 15 inch leader sprocket holes toward rear of reel pin 1 location rf part number trace code rf part number trace code rf part number trace code rf part number trace code rf part number trace code rf part number trace code rf part number trace code 2.00 0.05 4.00 0.10 f w 1.750.10 bo ko p ao 0.279 .020 direction of feed
24 of 24 rf5110g ds20151202 7628 th orndike road, greensboro, nc 27409-9421 for sales or t echnical support, contact rfmd / qorvo at (+1) 336-678-5570 or sales- support@qorvo.com. rohs compliant: yes package total weight in grams (g): 0.021 compliance date code: n/a bill of materials revision: a pb free category: e3 pb cd hg cr vi pbb pbde die 000000 molding compound 000000 lead frame 000000 die attach epoxy 000000 wire 000000 solder plating 000000 * directive 2002/95/ec of the european parliament and of the council of 27 january 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment rohs* banned material content bill of materials parts per million (ppm) this rohs banned material content declaration was prepared solely on information, including analytical data, provided to rfmd b y its suppliers, and applies to the bill of materials (bom) revision noted above.

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